A GaAs single crystal is used as a substrate of an element such as a field-effect transistor, a light emitting diode, a laser diode, etc., and generally prepared by a horizontal Bridgman method (hereinafter referred to as "HB" method) or a Czochralski method (hereinafter referred to as "CZ" method).
The HB method comprises solidifying a raw material melt in a quartz boat with horizontally displacing temperature distribution. By this method, the temperature gradient can be made small, so that a single crystal with less defects is prepared. However, since the single crystal is grown in the boat, the single crystal ingot has a semicircular cross section, and the shape of wafers which are sliced from the ingot is semicircular. Therefore, the sliced wafer should be trimmed to a circular wafer. Thus, the trimmed portion is wasted, which resluts in a high cost of the wafer.
The CZ method comprises melting the raw material in a crucible, dipping a seed crystal in the raw material melt and gradually pulling the seed crystal upwards to grow a single crystal. Since the single crystal vertically grows, it is easy to prepare a single crystal ingot having a circular cross section. In addition, since the single crystal is less contaminated with impurities, the undoped single crystal has high specific resistance.
The field-effect transistor requires a substrate having high specific resistance. The substrate made from the single crystal prepared by the HB method contains Si which has migrated from the quartz boat which acts as a donor and which reduces the specific resistivity, while the GaAs single crystal prepared by the CZ method does not have such drawbacks. However, the single crystal prepared by the CZ method tends to have lattice defects since a temperature gradient on the interface between solid and liquid phases (solid-liquid interface) is large.
The lattice defect is evaluated by measuring dislocation density in the single crystal, namely number of etch pits in a unit area, which is also called etch pit density (hereinafter referred to as "EPD").
Measurement of EPD is carried out by slicing the single crystal ingot to produce a thin wafer, polishing its surface to a specular condition and etching it, whereby the part containing the dislocation appears as a small pit. The number of the pits is counted by means of a microscope. EPD is defined as number of the pits per unit area.
EPD diversely varies throughout the ingot. Generally, distribution of EPD has the following tendencies:
1. When comparing EPD of upper and lower portions of the ingot, the upper portion which is closer to the seed crystal has low EPD, and the lower portion which is closer to the tail end has more defect and larger EPD. Sometimes, the lower portion forms a polycrystal instead of a single crystal.
2. The wafer which is sliced from the ingot also has diverging EPD. The periphery of the wafer has many defects and high EPD, and the center of the wafer also has high EPD. Thus, a portion between the periphery and the center has lower EPD. Therefore, the distribution of EPD is of a W figure shape.
3. As the diameter of the ingot is made larger, the increasing rate of EPD in the periphery becomes more significant. This phenomenon and the distribution of EPD described in the above item 2 occur for the same reason. When the diameter of the ingot is large, thermal stress in a radial direction increases and thus the lattice defects in the periphery significantly increases.
A single crystal having a small diameter, for example, of 10 to 20 mm is easily grown and one having EPD of 10,000 to 50,000/cm.sup.2 is comparatively easily prepared. However, it is difficult to grow a single crystal with a diameter of about 50 or 75 mm (2 or 3 inches) and low EPD.
Usually, EPD of the single crystal is from 50,000 to 150,000/cm.sup.2. Even if the single crystal is grown with a smaller temperature gradient as carefully as possible, EPD is only from 10,000 to 50,000/cm.sup.2.
The field-effect transistor made from a wafer having so many defects has diversely varying pinch-off voltage. Since the pinch-off voltage is one of the important parameters of the field-effect transistor, a number of devices cannot be integrated if their pinch-off voltages are not identical. In other words, for integrating the field-effect transistors on the GaAs substrate, it is indispensable to use low EPD wafers.
In the production of the light emitting diode or the laser diode. the situation is more serious. In these elements, comparatively large electric current flows through a narrow portion. Thus, if there are lattice defects, the function of the devices is abruptly deteriorated around the defects as cores. Therefore, it is highly desirable to reduce the EPD of the single crystal.
Now, several conventional methods for preparing the single crystal will be discussed.